Division of Microelectronic Systems Design (EMS)

Jonas Ney, M.Sc.


Address

Erwin-Schrödinger-Straße
Building 12, Room 245
67663 Kaiserslautern

Contact

Phone: (+49) 631 / 205-5452
Fax: (+49) 631 / 205-4437
Email: ney(at)eit.uni-kl.de

Research Areas

  • Artificial Neural Networks
  • FPGA-based Hardware Acceleration

Publications

FPGA-based Trainable Autoencoder for Communication Systems
J. Ney, S. Dörner, M. Herrmann, M. H. Sadi, J. Clausius, S. ten Brink, N. Wehn. Accepted for poster presentation. ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, February, 2022, Virtual Conference.

Embedded Face Recognition for Personalized Services in the Assistive Robotics
I. Walter, J. Ney, T. Hotfilter, V. Rybalkin, J. Höfer, N. Wehn, J. Becker. ITEM workshop ECML-PKDD, September, 2021, virtual conference.

When massive GPU parallelism ain't enough: A Novel Hardware Architecture of 2D-LSTM Neural Network
V. Rybalkin, J. Ney, M. Tekleyohannes, M. M. Ghaffar, N. Wehn. ACM Journal Transactions on Reconfigurable Technology and Systems (TRETS), 2021.
Link

HALF: Holistic Auto Machine Learning for FPGAs
J. Ney, D. Loroch, V. Rybalkin, N. Weber, J. Krueger, N. Wehn. 31th International Conference on Field-Programmable Logic and Applications (FPL), August, 2021, Dresden, Germany.

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