Division of Microelectronic Systems Design (EMS)

Menbere Tekleyohannes, M.Sc.


Address

Erwin-Schrödinger-Straße
Building 12, Room 228
67663 Kaiserslautern

Contact

Phone: (+49) 631 / 205-4803
Fax: (+49) 631 / 205-4437
Email: tekley(at)eit.uni-kl.de

Research Areas

  • 3D-DRAM Scheduling
  • Image Processing

Publications

iDocChip - A Configurable Hardware Architecture for Historical Document Image Processing: Multiresolution Morphology-based Text and Image Segmentation
M. Tekleyohannes, V. Rybalkin, M. M. Ghaffar, J. Varela, N. Wehn, A. Dengel. Accepted for publication, Springer International Journal of Parallel Programming, 2020.

iDocChip - A Configurable Hardware Architecture for Historical Document Image Processing: Text Line Extraction
M. Tekleyohannes, V. Rybalkin, S. S. Bukhari, M. M. Ghaffar, N. Wehn and A. Dengel. International Conference on Reconfigurable Computing and FPGAs (ReConFig 2019), December, 2019, Cancun, Mexico.

iDocChip - A Configurable Hardware Architecture for Historical Document Image Processing: Multiresolution Morphology-based Text and Image Segmentation
M. Tekleyohannes, V. Rybalkin, S. Bukhari, M. M. Ghaffar, J. Varela, N. Wehn, A. Dengel. International Embedded Systems Symposium (IESS 2019), September, 2019, Friedrichshafen, Germany.
Best Paper Award

A Reconfigurable Accelerator for Morphological Operations
M. Tekleyohannes, C. Weis, Norbert Wehn, M. Klein, M. Siegrist. IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)(RAW2018), May, 2018, Vancouver, Canada.

An Advanced Embedded Architecture for Connected Component Analysis in Industrial Applications
M. Tekleyohannes, M. Sadri, M. Klein, M. Siegrist, C. Weis, N. Wehn. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2017, Lausanne, Switzerland.

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