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EIT-EMS-732-V-7 - FPGA-Based Hardware Accelerators and Hybrid Systems

Veranstaltungsseite im KIS System


Tuesday, 10:00 - 11:30 Uhr, 12/270

Involved Staff

Dozent: Dr.-Ing. Christian De Schryver


This course teaches design, integration, and validation concepts for hardware-accelerated hybrid systems (in particular with FPGAs).  It focuses on the higher abstraction levels starting from the application itself, moving to over algorithm and execution platform selections to the final implementation.

The course consists of a lecture (2 h/week) and a mandatory lab part that can be carried out autonomously (~3 h/week). Consultation for the lab will be provided.

Covered topics in this course:

  • Application-level design space exploration and selection of appropriate implementation styles
  • High-level synthesis (HLS)
  • Dataflow modeling and computing (Maxeler Technologies)
  • Commercial hybrid devices (Xilinx Zynq 7000 All-Programmable SoC)
  • Virtual platforms (VPs) and SystemC / TLM basics
  • Validation with unit tests and integration tests
  • Development styles
  • Methods and tools for project tracking and collaboration


This course is targets later stage master students from electrical engineering, computer architecture, or computer science. The content of this course is based on and strongly linked to other courses from the embedded systems and microelectronics area in the faculty electrical engineering and computer engineering.

To successfully attend you require knowledge in the areas of computing architectures, RTL hardware design (VHDL or Verilog), basics of microelectronics, basic programming skills in C and object-oriented C++, and basic Linux skills.


The course is managed with the VCRP OLAT system (https://olat.vcrp.de/). Please enroll in the course FPGA-Based Hardware Accelerators (FPGAHS) SS 2016 for more information, materials, and updates.