Fachgebiet Entwurf Mikroelektronischer Systeme (EMS)

Dr.-Ing. Christian De Schryver


Anschrift

Erwin-Schrödinger-Straße
Gebäude 11, Raum 320
67663 Kaiserslautern

Kontakt

Telefon: (+49) 631 / 205-3530
Fax: (+49) 631 / 205-2612
Email: schryver(at)eit.uni-kl.de

Forschungsgebiete

  • Entwicklung energieeffizienter Hardwarebeschleuniger mit Fokus auf Anwendungen im Finanz- und Versicherungsbereich
  • Anwendungsspezifische Mehrprozessorplattformen
  • Virtual Prototyping

Lehrveranstaltungen

  • FPGA-Based Hardware Accelerators and Hybrid Systems

Interessen

Audio, Musik, Rechnersysteme, Fotografie

Publikationen

Increasing the Sampling Efficiency for the Link Assessment Problem
A. Chinazzo, C. De Schryver, K. Zweig, N. Wehn. In: Bast, H., Korzen, C., Meyer, U., Penschuck, M. (eds) Algorithms for Big Data. Lecture Notes in Computer Science, vol 13201, January, 2023, Springer.
DOI

A Custom Hardware Architecture for the Link Assessment Problem
A. Chinazzo, C. De Schryver, K. Zweig, N. Wehn. In: Bast, H., Korzen, C., Meyer, U., Penschuck, M. (eds) Algorithms for Big Data. Lecture Notes in Computer Science, vol 13201, January, 2023, Springer.
DOI

A Memory Centric Architecture of the Link Assessment Algorithm in Large Graphs
C. Brugger, V. Grigorovici, M. Jung, C. De Schryver, C. Weis, N. Wehn, K. Zweig. IEEE Design & Test Volume 35 Number 1, January/February 2018, pp. 7–15.

Increasing Sampling Efficiency for the Fixed Degree Sequence Model with Phase Transitions
C. Brugger, A. Chinazzo, A. John, C. De Schryver, N. Wehn, W. Schlauch, K. Zweig. Social Network Analysis and Mining (SNAM), 6(1):100, October, 2016. ISSN 1869-5469. DOI: 10.1007/s13278-016-0407-0.
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Exploiting the Brownian Bridge Technique to improve Longstaff-Schwartz American Option Pricing on FPGA Systems
J. Varela, C. Brugger, C. De Schryver, N. Wehn, S. Tang, S. Omland. Proceedings of the 2015 International Conference on Reconfigurable Computing and FPGAs (ReConFig 2015), December, 2015, Cancun, Mexico.

Optimization Strategies for Portable Code for Monte Carlo-Based Value-at-Risk Systems
J. Varela, C. Kestel, C. De Schryver, N. Wehn, S. Desmettre, R. Korn. Proceedings of the 8th Workshop on High Performance Computational Finance (WHPCF '15), November, 2015, Austin, USA.

Precision-Tuning and Hybrid Pricer for Closed-Form Solution based Heston Calibration
C. Brugger, G. Liu, C. De Schryver, N. Wehn. Journal of Concurrency and Computation: Practice and Experience (JCCPE), Wiley, 2015

Exploiting Phase Transitions for the Efficient Sampling of the Fixed Degree Sequence Model
C. Brugger, A. Chinazzo, A. F. John, C. De Schryver, N. Wehn, A. Spitz, K. Zweig. IEEE/ACM International Conference on Advances in Social Networks Analysis and Mining (ASONAM), August, 2015, Paris, France.

FPGA Based Accelerators for Financial Applications
C. De Schryver, editor. Springer International Publishing, July, 2015.
Link

Closed-Form Heston Pricers for Calibration
G. Liu, C. Brugger, C. De Schryver, N. Wehn. In FPGA Based Accelerators for Financial Applications, pages 221–242, Springer International Publishing, 1st edition, July, 2015.
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Exploiting Mixed-Precision Arithmetics in a Multilevel Monte Carlo Approach on FPGAs
S. Omland, M. Hefter, K. Ritter, C. Brugger, C. De Schryver, N. Wehn, A. Kostiuk. In FPGA Based Accelerators for Financial Applications, pages 191–220, Springer International Publishing, 1st edition, July, 2015.
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Bringing Flexibility to FPGA Based Pricing Systems
C. Brugger, C. De Schryver, N. Wehn. In FPGA Based Accelerators for Financial Applications, pages 167–190, Springer International Publishing, 1st edition, July, 2015.
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High-Bandwidth Low-Latency Interfacing with FPGA Accelerators Using PCI Express
M. Sadri, C. De Schryver, N. Wehn. In FPGA Based Accelerators for Financial Applications, pages 117–141, Springer International Publishing, 1st edition, July, 2015.
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Towards Automated Benchmarking and Evaluation of Heterogeneous Systems in Finance
C. De Schryver, C. Pereira Nogueira. In FPGA Based Accelerators for Financial Applications, pages 75–95, Springer International Publishing, 1st edition, July, 2015.
Link

A Custom Computing System for Finding Similarities in Complex Networks
C. Brugger, V. Grigorovici, M. Jung, C. Weis, C. De Schryver, K. Zweig, N. Wehn. Best Paper Award, IEEE Computer Society Annual Symposium on VLSI (ISVLSI), July, 2015, Montpellier, France.

Towards Run-Time Flexible Risk Management Systems on Hybrid Platforms
C. De Schryver. Invited Talk, 10th International Symposium on Reconfigurable and Communication-centric Systems-on-Chip (ReCoSoC), June, 2015, Bremen, Germany.

An Optimal Microarchitecture for Finding Similarities in Complex Networks Based on Optimal Memory Hierarchies
C. Brugger, V. Grigorovici, M. Jung, C. Weis, C. De Schryver, K. Zweig, N. Wehn. WIP, IEEE/ACM Design Automation Conference (DAC), June, 2015, San Francisco, CA, USA.

A Quantitative Cross-Architecture Study of Morphological Image Processing on CPUs, GPUs, and FPGAs
C. Brugger, L. Dal'Aqua, J. Varela, C. De Schryver, N. Wehn, Martin Klein, Michael Siegrist. In Proceedings of the 2015 IEEE Symposium on Computer Applications & Industrial Electronics (ISCAIE), April, 2015, Langkawi, Malaysia.

On Parallel Random Number Generation for Accelerating Hybrid Simulations of Communication Systems
C. Brugger, S. Weithoffer, C. De Schryver, U. Wasenmüller, N. Wehn. Advances in Radio Science, Volume 12, November, 2014.
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Heterogeneous Platforms for Big Data Applications
C. Brugger, C. De Schryver, N. Wehn. International Workshop on Heterogeneous Computing Platforms (HCP), November, 2014, San José, CA.
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Design Methodologies for Hardware Accelerated Heterogeneous Computing Systems
C. De Schryver. PhD thesis, University of Kaiserslautern, October, 2014.

HyPER: A Runtime Reconfigurable Architecture for Monte Carlo Option Pricing in the Heston Model
C. Brugger, C. De Schryver, N. Wehn. IEEE Field Programmable Logic and Applications (FPL), September, 2014, Munich, Germany.
Link

HyPER: A Runtime Reconfigurable Architecture for Monte Carlo Option Pricing in the Heston Model
C. Brugger, C. De Schryver, N. Wehn. WIP, IEEE/ACM Design Automation Conference (DAC), June, 2014, San Francisco, CA, USA.
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Mixed Precision Multilevel Monte Carlo on Hybrid Computing Systems
C. Brugger, C. De Schryver, N. Wehn, S. Omland, M. Hefter, K. Ritter, A. Kostiuk, R. Korn. IEEE Conference on Computational Intelligence for Financial Engineering and Economics (CIFEr), March, 2014, London, UK.
Link

Loopy - An Open-Source TCP/IP Rapid Prototyping and Validation Framework
C. De Schryver, P. Schläfer, N. Wehn, T. Fischer, A. Poetzsch-Heffter. Proceedings of the IEEE International Conference on Reconfigurable Computing and FPGAs (ReConFig), December, 2013, Cancún.
Link

High-Performance Hardware Acceleration of Asset Simulations
C. De Schryver, H. Marxen, S. Weithoffer, N. Wehn. Springer New York, "High-Performance Computing using FPGAs", ISBN 978-1-4614-1790-3, May, 2013.
Link

Research Project for Energy-Efficient Risk Management Acceleration Started
C. De Schryver. HiPEAC info 34 (Page 19), www.hipeac.net, May, 2013.

AXI4-Stream Upsizing/Downsizing Data Width Converters for Hardware-In-the-Loop Simulations
L. Vega, P. Schläfer, C. De Schryver. Technical Report, April, 2013, Kaiserslautern.
Link

A Multi-Level Monte Carlo FPGA Accelerator for Option Pricing in the Heston Model
C. De Schryver, P. Torruella, N. Wehn. In Proc. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2013, Grenoble, France.

Design space exploration of high throughput finite field multipliers for channel coding on Xilinx FPGAs
C. De Schryver, S. Weithoffer, U. Wasenmüller, N. Wehn. Advances in Radio Science, Volume 10, Pages 175–181, September, 2012.
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A Hardware Efficient Random Number Generator for Nonuniform Distributions with Arbitrary Precision
C. De Schryver, D. Schmidt, N. Wehn, E. Korn, H. Marxen, A. Kostiuk, R. Korn. International Journal of Reconfigurable Computing (IJRC), vol. 2012, March, 2012.
Article ID 675130, 11 pages
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Energy Efficient Acceleration of Asset Simulations Using FPGAs
C. De Schryver, N. Wehn. HiPEAC info 29, pages 10 - 11, www.hipeac.net, January, 2012.
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An Energy Efficient FPGA Accelerator for Monte Carlo Option Pricing with the Heston Model
C. De Schryver, I. Shcherbakov, F. Kienle, N. Wehn, H. Marxen, A. Kostiuk, R. Korn. Proceedings of the IEEE International Conference on Reconfigurable Computing and FPGAs (ReConFig), pages 468-474, December, 2011, Cancun, Mexico.
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Algorithmic Complexity in the Heston Model: An Implementation View
H. Marxen, A. Kostiuk, R. Korn, C. De Schryver, S. Wurm, I. Shcherbakov, N. Wehn. Proceedings of the fourth workshop on High Performance Computational Finance (WHPCF '11), pages 5-12, November, 2011, Seattle, Washington, USA.
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High-Performance Hardware Acceleration for Asset Simulations
C. De Schryver. Invited Talk, HiPEAC Design and Simulation Cluster Meeting, November, 2011, Barcelona, Spain.

Energy Efficient Acceleration and Evaluation of Financial Computations Towards Real-Time Pricing
C. De Schryver, M. Jung, N. Wehn, H. Marxen, A. Kostiuk, R. Korn. Proceedings of the 15th International Conference on Knowledge-Based and Intelligent Information & Engineering Systems (KES), pages 177-186, September, 2011, Kaiserslautern.
Link

Hardware Accelerators for Financial Mathematics - Methodology, Results and Benchmarking
C. De Schryver, H. Marxen, D. Schmidt. Proceedings of the 1st Young Researcher Symposium (YRS) 2011 (CEUR-WS.org, ISSN 1613-0073), pages 55-60, February, 2011, Kaiserslautern.
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A New Hardware Efficient Inversion Based Random Number Generator for Non-Uniform Distributions
C. De Schryver, D. Schmidt, N. Wehn, E. Korn, H. Marxen, R. Korn. Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig), pages 190-195, December, 2010, Cancun, Mexico.
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