Fachgebiet Entwurf Mikroelektronischer Systeme (EMS)

Jonas Ney, M.Sc.


Gebäude 12, Raum 245
67663 Kaiserslautern


Telefon: (+49) 631 / 205-5452
Fax: (+49) 631 / 205-4437
Email: ney(at)eit.uni-kl.de


  • Artificial Neural Networks
  • FPGA-based Hardware Acceleration



Efficient FPGA Implementation of an ANN-Based Demapper using Cross-Layer Analysis
J. Ney, B. Hammoud, S. Dörner, M. Herrmann, J. Clausius, S. ten Brink, N. Wehn. Electronics Special Issue "Applications of FPGAs and Reconfigurable Computing: Current Trends and Future Perspectives", April, 2022.

A Hybrid Approach combining ANN-based and Conventional Demapping in Communication for Efficient FPGA-Implementation
J. Ney, B. Hammoud, N. Wehn. Accepted for publication, 29th Reconfigurable Architectures Workshop (RAW 2022), May, 2022, Lyon, France.

FPGA-based Trainable Autoencoder for Communication Systems
J. Ney, S. Dörner, M. Herrmann, M. H. Sadi, J. Clausius, S. ten Brink, N. Wehn. ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, February, 2022, Virtual Conference.

Embedded Face Recognition for Personalized Services in the Assistive Robotics
I. Walter, J. Ney, T. Hotfilter, V. Rybalkin, J. Höfer, N. Wehn, J. Becker. ITEM workshop ECML-PKDD, September, 2021, virtual conference.

When massive GPU parallelism ain't enough: A Novel Hardware Architecture of 2D-LSTM Neural Network
V. Rybalkin, J. Ney, M. Tekleyohannes, M. M. Ghaffar, N. Wehn. ACM Journal Transactions on Reconfigurable Technology and Systems (TRETS), 2021.

HALF: Holistic Auto Machine Learning for FPGAs
J. Ney, D. Loroch, V. Rybalkin, N. Weber, J. Krueger, N. Wehn. 31th International Conference on Field-Programmable Logic and Applications (FPL), August, 2021, Dresden, Germany.

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