Fachgebiet Entwurf Mikroelektronischer Systeme (EMS)


Jonas Ney
A Hardware Architecture of a Deep Convolutional Encoder-Decoder Network for Page Segmentation of Historical Handwritten Documents (Masterarbeit)
Betreuer: Vladimir Rybalkin, Muhammad Mohsin Ghaffar

Stefan Pajonk
Exploration and Benchmarking of Memory Architecture Using Virtual Prototyping (Masterarbeit)
Betreuer: Éder Ferreira Zulian

Yannick Robin
Generic On-Chip Memory Generator for ASIC Design Exploration (Masterarbeit)
Betreuer: Jan Lappas

Felipe Salerno Prado
A Domain-Specific Language for Describing DRAM Behavior (Masterarbeit)
Betreuer: Christian Weis, Matthias Jung (IESE)

Khalil Esper
Implementation and Evaluation of Industry 4.0 Service-oriented Production Using Revolution Pi (Masterarbeit)
Betreuer: Christian Weis, Matthias Jung (IESE)

Manoj Hanumaiah
Evaluation and Implementation of an Indoor Localization System for Fraunhofer IESE Concept Cars (Masterarbeit)
Betreuer: Matthias Jung, C. Peper (IESE), Christian Weis

Oliver Broschart
Automated Design and Implementation of a DDR4 Receiver (Masterarbeit)
Betreuer: Jan Lappas, Christian Weis

Lukas Steiner
Simulation of Emerging Memory Standards with DRAMSys (Masterarbeit)
Betreuer: Matthias Jung, Christian Weis

Patrik Eckes
Sensor Fusion Approaches for the Detection of Door and Window Events in Buildings (Bachelorarbeit)
Betreuer: Frederik Lauer, Carl Rheinländer


Daniel Rühm
Development of an Input Device with Steam VR Tracking (Masterarbeit)
Betreuer: Christian Weis, Ricardo A. Tauro (ITK)

David Schall
Investigation and Evaluation of hardware-based Memory Encryption and Integrity (Masterarbeit)
Betreuer: Christian Weis, Andreas Sandberg (ARM)

Daniel Gretzke
Design and Implementation of a Blockchain-Based Smart Outlet Concept (Bachelorarbeit)
Betreuer: Carl Rheinländer, Frederik Lauer

Josua Mayer
Development of a transparent Gateway for Internet of Things Devices using IPv6 over Bluetooth Low Energy (Bachelorarbeit)
Betreuer: Carl Rheinländer, Frederik Lauer

Jens Ullmert
Design of an FMC compatible eMMC Adapter Board for Hybrid Memory Emulations (Bachelorarbeit)
Betreuer: Carl Rheinländer

Maxmilian Moritz Schöffel
Design and Implementation of a Hybrid Memory Controller (Masterarbeit)
Betreuer: Deepak M. Mathew

Claudien Nyituriki
A High-Level Implementation of a Hybrid Memory Controller for DRAM and NVM (Diplomarbeit)
Betreuer: Deepak M. Mathew

Surabhi Jain
Parallelism Selection For Performance Improvement Under Area Constraints In Systems With FPGA Accelerators (Masterarbeit)
Betreuer: Christian Weis

Ivi Prifti
RTL Design, Verification, ASIC Implementation of an LPDDR4 Memory Controller and Research on Feasible Schedulers (Masterarbeit)
Betreuer: Chirag Sudarshan

Anjie Qiu
Window Skipping for Unrolled Turbo Decoders (Masterarbeit)
Betreuer: Stefan Weithoffer


Rodrigo Cortes Porto
Integration of SystemC-AMS Simulation Platform into TTool (Masterarbeit)
Betreuer: Christian Weis

Mhd. Rashed Al Koutayni
Hardware Implementation of CNN-Based Hand Pose Estimation on FPGA (Masterarbeit)
Betreuer: Vladimir Rybalkin

Vitor Ribero Roriz
Development of a High-level TCP/IP Driver for a Message-passing Real-time Operating System (Masterarbeit)
Betreuer: Christian Weis

Anes Benmerzoug
Hardware Aware Training and Architecture Exploration For a Multi-Dimensional LSTM Neural Network (Masterarbeit)
Betreuer: Vladimir Rybalkin

Manikantan Ravichandran
RISC-V based Reconfigurable Deep Learning Accelerator Framework Implemented on FPGAs (Masterarbeit)
Betreuer: Christian Weis

Johannes Feldmann
An Application Specific Memory Controller for Video Stream Processing (Masterarbeit)
Betreuer: Christian Weis

Christopher Schmidt
Ein Generatortool für abgerollte vollparallele LDPC Code Decoder (Studienarbeit)
Betreuer: Matthias Herrmann

Yannick Robin
Comparative Study on Different Types of DRAM Sense-Amplifier Implementations for In-Memory-Processing (Bachelorarbeit)
Betreuer: Jan Lappas

Niklas Thiedecke
CORDIC-Hardwareimplementierung mit erweitertem Funktionsumfang und erweitertem Konvergenzbereich (Bachelorarbeit)
Betreuer: Christian Weis

Lukas Krupp
Zeitliche Synchronisation von Basisstationen in drahtlosen Netzwerken für einen echtzeitfähigen Handover-Mechanismus (Bachelorarbeit)
Betreuer: Carl Rheinländer

Doris Gulai
Modeling of LPDDR4-DRAM in DRAMSys (Bachelorarbeit)
Betreuer: Christian Weis

Lukas Steiner
Hardware Implementation & Evaluation of Morphological Reconstruction Filter (Bachelorarbeit)
Betreuer: Menbere Tekleyohannes

Jonas Ney
Exploration of a New All Programmable Heterogeneous MPSoC Computing Platform Xilinx Zynq Ultra Scale+ with Application to Machine Learning (Bachelorarbeit)
Betreuer: Vladimir Rybalkin, Menbere Tekleyohannes

André Lucas Chinazzo
ReRAMSpec: High-Level Modelling of High Density Resistive RAM Cross-Point Arrays (Masterarbeit)
Betreuer: Deepak Mathew, Christian Weis

Frederik Lauer
High Secure Ultra Low Power IoT Infrastructure Exploration (Masterarbeit)
Betreuer: Carl Rheinländer, Claus Kestel

Chetan Dobariya
Design and Implementation of an eDRAM Array using a 2T Gain Cell in UMC’s 65 nm Technology (Masterarbeit)
Betreuer: Christian Weis

Amir Massah Bavani
An Efficient Reconfigurable Hardware Accelerator for Deep Convolutional Neural Network using 3D Systolic Arrays (Masterarbeit)
Betreuer: Vladimir Rybalkin, Muhammad Mohsin Ghaffar

Maycon Douglas Da Silva Carvalho
A heterogeneous embedded computing system for parallel processing of frames extracted from real-time video streams (Masterarbeit)
Betreuer: Carl RheinländerChristian Weis

Martin Zeyen
Untersuchung des Noisy Gradient Descent Bit-Flipping Algorithmus zum Decodieren von LDPC Codes (Diplomarbeit)
Betreuer: Kira KraftStefan Weithoffer

Nkrumah Offonry
An Empirical Exploration of Different ECCs for Next-Generation DRAMs and Memories (Masterarbeit)
Betreuer: Christian Weis

Anjie Qiu
Implementation and Evaluation of the Belief-Propagation Algorithm for LTE-Turbo-Codes (Bachelorarbeit)
Betreuer: Stefan Weithoffer

Zum Seitenanfang