Modelling of DRAM-based PIM architecture in an open-source cycle-accurate SystemC/TLM-based DRAM simulator
●●●○○ Hardwaredesign
●●●●● Programming
●●○○○ Theory
Supervisor: C. Sudarshan
●●●○○ Hardwaredesign
●●●●● Programming
●●○○○ Theory
Supervisor: C. Sudarshan
●○○○○ Hardwaredesign
●●●●● Programming
●●●●○ Theory
Supervisor: M. Jung
●●●○○ Hardwaredesign
●●●●● Programming
●●●○○ Theory
Supervisor: M. Jung
●●●○○ Hardwaredesign
●●●○○ Programming
●●●○○ Theory
Supervisor: J. Lappas, C. Sudarshan, C. Weis
●●●●○ Hardwaredesign
●●●○○ Programming
●●●○○ Theory
Supervisor: C. Kestel
●●○○○ Hardwaredesign
●●●●● Programming
●○○○○ Theory
Supervisor: J. Feldmann, M. Jung
●●●○○ Hardwaredesign
●●●●● Programming
●●●○○ Theory
Supervisor: M. Jung