Formal Verification of DRAM Controllers Using Timed Petri Nets
●●●○○ Hardwaredesign
●●●●○ Programming
●●●●○ Theory
Supervisor: L. Steiner, C. Sudarshan, T. Ludwig
Freie Arbeiten
Estimation of the Roofline Model with gem5
●●●○○ Hardwaredesign
●●●●● Programming
●●●○○ Theory
Supervisor: M. Jung
Design and Implementation of (LP)DDR4 DRAM Controllers and PHYs
●●●○○ Hardwaredesign
●●●○○ Programming
●●●○○ Theory
Supervisor: J. Lappas, C. Sudarshan, C. Weis
Hardwareimplementierung eines Decoders für Polar Codes
●●●●○ Hardwaredesign
●●●○○ Programming
●●●○○ Theory
Supervisor: C. Kestel
A SystemC Visualization Tool
●●○○○ Hardwaredesign
●●●●● Programming
●○○○○ Theory
Supervisor: J. Feldmann, M. Jung
Modelling Emerging Memories with SystemC TLM2.0
●●●○○ Hardwaredesign
●●●●● Programming
●●●○○ Theory
Supervisor: M. Jung