Classification:

●●●●○ Hardwaredesign
●●●●○ Programming
●●○○○ Theory

Type of work:

Master Thesis

Assignment:

• Comparison of EMS-RISC-V VS. 32-bit 2-stage Ibex (formerly Zero-riscy) (Area, Max. Freq.)
• Evaluation of memory footprint of Wavious DDR (WDDR) Physical interface (PHY) Firmware (https://github.com/waviousllc/wav-lpddr-sw)
• Implementation of an algorithm for calibration of off-chip drivers and delays for per-bit deskewing

Skills:

• Digital Hardware Design
• Lectures:  EMSSI+II, Embedded Processor Lab,
• System Verilog
• Assembler/ C Programming of Embedded Systems

Supervisor:

J. Feldmann, J. Lappas

Student:

Ali Shamya

Year:

2022